Via C3 has problems with cache coherency when transitioning between the modes,
so flush it around bios calls.

Condition was accidentally reversed, so PIT calibration always failed
when PIT was present and always succeeded when PIT was missing, but in
the latter case resulted in absurdly fast clock.

Reported and tested by Vitaly Kuznetsov <vkuznets@redhat.com>

PIT isn't available on some of new hardware including Hyper-V. So
use pmtimer for calibration. Moreover pmtimer calibration is faster, so
use it on coreboor where booting time is important.

Based on patch by Michael Chang.

Binary is checked identical.

It's not used there.

Shaves off 6 bytes in lzma_decompress.img.

Is more portable.
Binary is unchanged (verified).

Found by: Coverity scan.

	no division by 0 occurs.

	if E820 failed to return any regions.

	region.

	It's not used currently and cannot be used safely currently.

	linker trying to "fixup" the code.

	than converting to long.

	Just "packed" doesn't always pack the way we expect.

	by using bitfields.

	Move more code to common dl.c. Add missing veneers for arm and arm64.
	Decreases kernel size by 70 bytes on i386-pc (40-50 compressed)

	include/grub/i386/memory_raw.h and eliminate duplicate declarations.

	XEN PV environment and load kernels.

	unknown types through.

	i386-multiboot.

	coreboot payload (e.g. when loaded from SeaBIOS-as-payload).

	memory map.

	coreboot tables content. Support for cbmemc.

	corruption with big core on small memory systems. Document remaining
	limits.

	Fix end of table condition.